The scientists said their advance would equal a leap of three generations of Moore’s Law, a prediction formulated in 1964 by Intel co-founder Gordon Moore that forecast chip makers could double the number of transistors on a chip every couple of years. “This is three generations of Moore’s Law, without having to do all the research and development to shrink the transistors,” said Stan Williams, a senior fellow at HP in Palo Alto. “If in some sense we can leapfrog three generations, that is something like five years of R&D. That is the potential of this breakthrough.”
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HP researchers plan to start manufacturing prototypes of their chip design later this year. They also said they expect to see a high rate of defects in the finished products, but that the greater amount of defects will be compensated for by the ability of the circuitry to quickly route around the failed circuits. The model for their chip design is based on a 45-nanometer chip, but with much smaller wiring in the chicken-wire crossbars of 4.5 nanometers.

“Hopefully, by the middle of this year, we will have a real working chip that we have run through an HP fab,” Williams said. “Our goal is that by 2010, we will have something that we can give our customers to play with.”